Joseph Maria530 BISTelecommunication SystemsCoursework 2 1) If the noise pulse signal cross the decision level of the detector then an error will occur in the bit value. If the noise is Gaussian there is equal probability for the noise voltage to increase the sample value and to decrease the sample value. Sampling at mid-interval T could result in an error if the noise value is happen to be large.Backward error control is a scheme in which the data is sent coded so that the receiver can detect errors, the receiver requests retransmission of a data block (frame) contain an error. Examples of backward error control code are ARQ (Automatic Request for repeat), BI-QUINARY, GREY CODE.Parity check bit involves the addition of a single extra bit (the parity bit) to the data. The logic value assigned to the parity bit ensures the number of 1’s in the data block is even if using even parity and odd if odd parity.Cyclic Redundancy Check (CRC): During transmission the serial data stream is passed through a special electronic circuit that generates a frame check sequence (fcs) which is appended to the data. The fcs is actually the remainder that is generated when the electronic circuit divides the data steam by a known polynomial. During reception of the data, the receiver generates a new fcs that is compared with the transmitted fcs. Equality equates to error free transmission; inequality indicates an error but not the location of the error. CRC detects all single bit error, all double bit error, all burst errors which are less than the fcs length and most other burst errors. The ARQ (Automatic Request for repetition) is a code with standard redundancy. Each character contains seven bits of which only 3 are “1” bits. This gives the code its natural error detecting ability. If the signal arrives contaminated by noise that a code contains ‘mark’-to-‘space’ proportions other than 3:4, an ARQ signal is sent ...
