/AT. Compaq's Deskpro 386 had a further performance innovation in its bus architecture - it split the x86 external bus into two separate buses: a fast local bus to support memory chips fast enough for a 16 MHz 386, and a slower I/O bus that supported existing expansion cards.The Sun SPARC ArchitectureIn July 1987, Sun announced a RISC architecture called SPARC, which stood for Scalable Processor ARChitecture. Like MIPS, SPARC was the descendant of one of the three pioneering RISC projects, in this case the Berkeley RISC project led by David Patterson. Like MIPS, SPARC was a sleek pipelined design - a radical departure from the complex CISC architectures which held sway at the time. It had about 60 instructions and was a load store architecture with two addressing modes. The instruction set didn't even include integer multiply or divide! SPARC also had one interesting feature which even the MIPS architecture did not have - register windows - which allowed for up to a whopping 520 integer registers (the first implementation had 120), 32 of which were accessible at any given instant. There were also 32 floating point registers. From the beginning, SPARC was an open RISC architecture (ie: a specification to which anyone could build compatible chips). The idea was to make the architecture open to encourage multiple sourcing and lively competition which would hopefully spur performance and spread the SPARC standard far and wide. This strategy worked well, and by 1995 over a dozen different processors had been built implementing the SPARC architecture, outstripping even the x86 line in terms of the number of different implementations. Holding true to its name, the SPARC architecture scaled very well, ranging from low power notebooks and portables to huge million dollar Cray supercomputers. SPARC based systems went on to dominate the UNIX workstation and server markets.Rapid time to market was an important goal of the SPARC architecture, so Sun...
