nal Pentium, the MMX Pentium provides both a fixed-point integer data path that allows up to two operations to be executed simultaneously, and a floating point data path that allows one operation to be performed at a time. In addition, the MMX Pentium provides a new MMX data path that allows up to two MMX operations to execute simultaneously, or up to one MMX operation and one integer operation (in the integer data path) to execute simultaneously. The inte-ger data path includes two ALUs and supports operations on 8-, 16-, and 32-bit integers. (4)The MMX processor is available in speeds from 166MHz to 333MHz.Finally the Pentium II processor combines the best features of both the Pentium Pro and Pentium MMX on one chip. Including a 64-bit dual independent bus (system bus & cache bus) enhances performance. This was first realized on the Pentium Pro, the pipelined system bus en-ables multiple simultaneous transactions, which accelerates the flow of information within the system and boosts overall performance. Another feature stemming from the Pentium Pro is Dynamic Execution Technology (changing the order of executed instructions based on data dependencies). With its 7.5 million transistors the Pentium II processors can handle up to 64GB of RAM. “The independent cache bus runs at half the CPU clock, giving a bus speed of 166MHz with a 333MHz processor.” (2)In short, modern RISC processors such as the DEC Alpha 21164 execute many simple instructions by using more registers. RISC processors are able to execute the instructions rela-tively fast due to the use of fixed length instructions. The Alpha for example requires that all instructions are 32 bits in length. Each instruction is loaded and executed before the next. CISC processors on the other hand, deal with variable length instructions and typically become bloated or bogged down by complicating the job of the control unit. Intel seems to have gotten around this inconvenience...
